1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * linux/drivers/char/serial_core.h
5 * Copyright (C) 2000 Deep Blue Solutions Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #ifndef LINUX_SERIAL_CORE_H
22 #define LINUX_SERIAL_CORE_H
24 #include <linux/serial.h>
27 * The type definitions. These are from Ted Ts'o's serial.h
29 #define PORT_UNKNOWN 0
36 #define PORT_16650V2 7
38 #define PORT_STARTECH 9
39 #define PORT_16C950 10
43 #define PORT_NS16550A 14
44 #define PORT_XSCALE 15
45 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
46 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
47 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
48 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */
49 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */
50 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */
51 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */
52 #define PORT_8250_CIR 23 /* CIR infrared port, has its own driver */
53 #define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */
54 #define PORT_BRCM_TRUMANAGE 25
55 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */
56 #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */
57 #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
58 #define PORT_RT2880 29 /* Ralink RT2880 internal UART */
59 #define PORT_16550A_FSL64 30 /* Freescale 16550 UART with 64 FIFOs */
62 * ARM specific type numbers. These are not currently guaranteed
63 * to be implemented, and will change in the future. These are
64 * separate so any additions to the old serial.c that occur before
65 * we are merged can be easily merged here.
69 #define PORT_CLPS711X 33
70 #define PORT_SA1100 34
71 #define PORT_UART00 35
75 /* Sparc type numbers. */
76 #define PORT_SUNZILOG 38
77 #define PORT_SUNSAB 39
83 #define PORT_PCH_8LINE 44
84 #define PORT_PCH_2LINE 45
90 /* Parisc type numbers. */
96 /* Macintosh Zilog type numbers */
97 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
98 #define PORT_PMAC_ZILOG 51
105 /* Samsung S3C2410 SoC and derivatives thereof */
106 #define PORT_S3C2410 55
108 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
109 #define PORT_IP22ZILOG 56
111 /* Sharp LH7a40x -- an ARM9 SoC series */
112 #define PORT_LH7A40X 57
114 /* PPC CPM type number */
117 /* MPC52xx (and MPC512x) type numbers */
118 #define PORT_MPC52xx 59
123 /* Samsung S3C2440 SoC */
124 #define PORT_S3C2440 61
126 /* Motorola i.MX SoC */
132 /* TXX9 type number */
135 /* NEC VR4100 series SIU/DSIU */
136 #define PORT_VR41XX_SIU 65
137 #define PORT_VR41XX_DSIU 66
139 /* Samsung S3C2400 SoC */
140 #define PORT_S3C2400 67
143 #define PORT_M32R_SIO 68
148 #define PORT_PNX8XXX 70
153 /* SUN4V Hypervisor Console */
154 #define PORT_SUNHV 72
156 #define PORT_S3C2412 73
158 /* Xilinx uartlite */
159 #define PORT_UARTLITE 74
165 #define PORT_KS8695 76
167 /* Broadcom SB1250, etc. SOC */
168 #define PORT_SB1250_DUART 77
170 /* Freescale ColdFire */
174 #define PORT_BFIN_SPORT 79
176 /* MN10300 on-chip UART numbers */
177 #define PORT_MN10300 80
178 #define PORT_MN10300_CTS 81
180 #define PORT_SC26XX 82
183 #define PORT_SCIFA 83
185 #define PORT_S3C6400 84
187 /* NWPSERIAL, now removed */
188 #define PORT_NWPSERIAL 85
191 #define PORT_MAX3100 86
193 /* Timberdale UART */
194 #define PORT_TIMBUART 87
196 /* Qualcomm MSM SoCs */
199 /* BCM63xx family SoCs */
200 #define PORT_BCM63XX 89
202 /* Aeroflex Gaisler GRLIB APBUART */
203 #define PORT_APBUART 90
206 #define PORT_ALTERA_JTAGUART 91
207 #define PORT_ALTERA_UART 92
210 #define PORT_SCIFB 93
213 #define PORT_MAX310X 94
215 /* TI DA8xx/66AK2x */
216 #define PORT_DA830 95
222 #define PORT_VT8500 97
224 /* Cadence (Xilinx Zynq) UART */
225 #define PORT_XUARTPS 98
227 /* Atheros AR933X SoC */
228 #define PORT_AR933X 99
230 /* Energy Micro efm32 SoC */
231 #define PORT_EFMUART 100
233 /* ARC (Synopsys) on-chip UART */
236 /* Rocketport EXPRESS/INFINITY */
239 /* Freescale lpuart */
240 #define PORT_LPUART 103
243 #define PORT_HSCIF 104
245 /* ST ASC type numbers */
248 /* Tilera TILE-Gx UART */
249 #define PORT_TILEGX 106
251 /* MEN 16z135 UART */
252 #define PORT_MEN_Z135 107
255 #define PORT_SC16IS7XX 108
258 #define PORT_MESON 109
260 /* Conexant Digicolor */
261 #define PORT_DIGICOLOR 110
264 #define PORT_SPRD 111
266 /* Cris v10 / v32 SoC */
267 #define PORT_CRIS 112
270 #define PORT_STM32 113
273 #define PORT_MVEBU 114
275 /* Microchip PIC32 UART */
276 #define PORT_PIC32 115
279 #define PORT_MPS2UART 116
282 #define PORT_MTK_BTIF 117
284 #endif /* LINUX_SERIAL_CORE_H */